module sniffer (
        input clk,
        input rst_n,
	
        input [31:0] endereco_sniffer,
        input write_sniffer,
        input read_sniffer,
        input [31:0] dado_sniffer,
        input chipselect_sniffer,
	
        input [2:0] address,
        input read,
        input write,
        input chipselect,
        input [3:0] byteenable,
        input [31:0] writedata,
	
        output logic [31:0] readdata,
	
        output logic aut_int,
        output logic error_int

    );

    logic write_r;
    logic read_r;

	
    logic [31:0] dados [0:15];
    logic tipo [0:15];
    logic [31:0] endereco[0:15];

    logic [3:0] head_dado;
    logic [3:0] head_tipo;
    logic [3:0] head_addr;
    logic [3:0] tail_dado;
    logic [3:0] tail_tipo;
    logic [3:0] tail_addr;


    always_ff @(posedge clk)
    begin
        if(!rst_n)
        begin
            write_r <= 0;
            read_r <= 0;
            aut_int <= 0;
            error_int <= 0;
            head_dado <= 0;
            head_tipo <= 0;
            head_addr <= 0;
            tail_dado <= 0;
            tail_tipo <= 0;
            tail_addr <= 0;
        end
        else
        begin
            write_r <= write_sniffer;
            read_r <= read_sniffer;
		
            if(chipselect)
            begin
                if(write)
                begin
                    if(address == 0)
                    begin
                        aut_int <= 0;
                    end
                    if(address == 1)
                    begin
                    	error_int <= 0;
                    end
                end
                else if(read)
                begin
                    case(address)
                        0:
                        begin
                            readdata <= {{(31){1'b0}}, aut_int};
                        end
                        1:
                        begin
                            readdata <= dados[head_dado];
                            if(head_dado == tail_dado)
                            begin
                                head_dado <= 0;
                                tail_dado <= 0;
                            end
                            else
                            begin                     
                            	//head_dado <= head_dado + 1;
                            end
                        end
                        2:
                        begin
                            readdata <= {{(31){1'b0}}, tipo[head_tipo]};
                            if(head_tipo == tail_tipo)
                            begin
                                head_tipo <= 0;
                                tail_tipo <= 0;
                            end
                            else
                            begin
                            	//head_tipo <= head_tipo + 1;
                            end
                        end
                        3:
                        begin
                            readdata <= endereco[head_addr];
                            if(head_addr == tail_addr)
                            begin
                                head_addr <= 0;
                                tail_addr <= 0;
                            end
                            else
                            begin
	                            //head_addr <= head_addr + 1;
                            end
                        end
                        4:
                        begin
                        	readdata <= tail_dado;
                        end
                        default:
                        readdata <= 0;
                    endcase
                end
            end
            else if(chipselect_sniffer)
            begin 
                if(write_sniffer == 1 && write_r == 0)
                begin
                    aut_int <= 1;
                    tipo[tail_tipo] <= 0;
                    endereco[tail_addr] <= endereco_sniffer;
                    dados[tail_dado] <= dado_sniffer;
                    tail_tipo <= tail_tipo + 1;
                    tail_dado <= tail_dado + 1;
                    tail_addr <= tail_addr + 1;
                    if(tail_tipo == 15)
                    begin
                    	error_int <= 1;
                    end
                end
                else if(read_sniffer == 1 && read_r == 0)
                begin
                    aut_int <= 1;
                    tipo[tail_tipo] <= 1;
                    endereco[tail_addr] <= endereco_sniffer;
                    dados[tail_dado] <= dado_sniffer;
                    tail_tipo <= tail_tipo + 1;
                    tail_dado <= tail_dado + 1;
                    tail_addr <= tail_addr + 1;
                    if(tail_tipo == 15)
                    begin
                    	error_int <= 1;
                    end
                end
            end
        end
    end



endmodule
